Tag: Cromix

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More Memory

Posted on by Graham

Wishing to be able to run the disk checks properly to be able to run lots of processes, and haunted by the thought that more memory failures can be expected on the 512MSU, i again turned to a modern solution.

This time it was a static memory board designed by John Monahan:

http://s100computers.com/My System Pages/16MG RAM Board/16MG RAM Board.htm

I could have gone for the full 16MB and filled the address space but i wanted to keep the 512MSU so i built an 8MB version. The existing memory could be moved just by changing some DIP switches on the MCU.

This project would probably still be pending but for a bare board being up for sale in South Australia.

If a generic memory board is used instead of the MCU/512MSU then:

  1. It must support a Phantom signal
  2. The 16FDC needs to be modified to provide a Phantom signal
  3. The Phantom signal needs to either be on a different pin from the normal 67 or the DPU needs to be modified to not use pin 67 eg by cutting pin 6 of IC 41.  It’s probably better to modify the new board to use pin 69 and be consistent with other group members.

https://groups.google.com/g/cromemco/c/T_eui2YJEQ0/m/FkrSFaYtBwAJ

I think it may still be possible to use the DPU as well if the memory card is 4MB or 8MB.  It just needs to be located after the new board.  It can’t go before because the board boundaries are not fine enough.

The SRAM is expensive at over $10 per MB.  In the end it was easier to get the 4MB parts and two are required so I built an 8MB variant.

This card will be located at 0000H-7FFFFH. The 512MSU will be at 8000H-87FFH and the DIP switch will need to 01000.

The biggest challenge with building the board is mounting the TSSOP packages.  I used paste and hot air and cleaned up the excess with solder wick.  There were some troublesome bridges one of which only cleared after reflowing with hot air.

I had a look at the PAL equations just to make sure they would work with 8MB.

GAL5:

/BOARD_SELECT  =  sINTA  + sINP  + sOUT  + /PHANTOM@

bsMEMR@ =       /bsMEMR

GAL6:

/S100_8_RD_OE@      =      /RD8@  * bA0   * BOARD_SEL * /pSYNC                  ;U19, 8 Bits to CPU, odd/high address
                         + /RD16@         * BOARD_SEL * /pSYNC                  ;Any 16 bit data Read
                         + /WR16@         * BOARD_SEL * /pSYNC                  ;Any 16 bit data Write

/S100_8X_RD_OE@      =     /RD8@  * /bA0  * BOARD_SEL * /pSYNC                  ;U31, 8 Bits to CPU even/low address

There seemed to be no interest in the address lines ie this board is selected regardless of the address (except for the phantom).  For a 16MB card that would be correct. And it doesn’t matter for writes as long as all of the address lines are in use at P101 – this should just cause a write to RAM that isn’t loaded. But it would cause a read contention with a board in the top 8MB eg where I want the old 512kB to be.

I think that for my situation GAL5 so that /BOARD_SELECT is asserted only when the for the first 8MB.

/BOARD_SELECT  =  sINTA  + sINP  + sOUT  + /PHANTOM@ + A23

I made the change.

It took hours to run the 68k RAM test in CDOS, but it was successful. 8.5MB of RAM was good to go.

cromix.sys had to be regenerated with an updated sysdef. After this there was abundant memory! There are a bunch of tweaks that i could do to take further advantage of the memory and i think a RAM disk could also be added.